Subject: NetFPGA Tutorial and ISOC Panel on Virtual Worlds and Gaming

From: IETF Chair <[email-masked]>
Date: Sun, 7 Feb 2010 07:53:40 -0800 (PST)

Dear Colleagues:

I am writing to make sure that you are aware of two events that are going
to take place in close proximity to IETF 77 in Anaheim, California, USA.
Neither of these events is affiliated with the IETF, but I thought that
you would like to be aware of them.

First, there will be a full-day tutorial about NetFPGA on Sunday, March
21st.  The NetFPGA platform, developed at Stanford University, enables
researchers and instructors to build high-speed, hardware-accelerated
networking systems. The platform can be used to study hardware for
Ethernet switches, IP routers, and advanced services for next-generation
networks.

Second, following the successful Internet Society (ISOC) lunch-time
panels at IETF 74, 75, and 76, there will be another panel on Tuesday,
March 23rd.   This panel will focus on Internet applications beyond the
Web and traditional network services: virtual worlds and gaming.  A
lively discussion of deployment and policies is expected.

There is more information about the NetFPGA tutorial below.  I will
forward information about ISOC lunch-time panel when it becomes available.

I hope to see you in Anaheim,
  Russ

----- NetFPGA Tutorial on 21 March 2010 -----

An open platform called the NetFPGA has been developed at Stanford
University. The NetFPGA platform enables researchers and instructors to
build high-speed, hardware-accelerated networking systems. The platform
can be used in the classroom to teach students how to build Ethernet
switches and Internet Protocol (IP) routers using hardware rather than
software. The platform can be used by researchers to prototype advanced
services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new
types of packet routing circuits to be implemented and detailed
measurements of network traffic to be obtained. During the tutorial, we
will use the NetFPGA to determine the amount of memory needed to buffer
TCP/IP data streaming through the Gigabit/second router. Hardware
circuits within the NetFPGA will be implemented to measure and plot the
occupancy of buffers. Circuits will be downloaded into reconfigurable
hardware and tested with live, streaming Internet video traffic.

Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A
basic understanding of Ethernet switching and network routing is
expected. Past experience with Verilog is useful but not required.

Details about this event and registration information are posted on-line
at: http://netfpga.org/tutorials/IETF2010/index.php

A list of future and past NetFPGA tutorials is available on-line at:
http://netfpga.org/php/events.php